Navigating the Complexities of Silicon Interposer Design Panel
This year at DesignCon 2025, Senior Principal SIPI Engineer at Rosenberger North America, Raul Stavoli, participated on the panel βNavigating the Complexities of Silicon Interposer Designβ, where industry experts spoke about current challenges of advanced packaging. The challenges are diverse, ranging from architecture, database management, in-design analysis, extraction and validation.
Stavoli presented the challenges silicon interposer teams face to efficiently explore the large solution space with intelligent database management and various solvers. In particular, he detailed how to leverage hybrid and 3D solvers to extract and validate the power delivery network (PDN) during various stages of the design. Power Integrity challenges will remain at the forefront due to the large model sizes and increased performance requirements.
Rosenberger North America (RNA) is uniquely positioned to support the testing and validation of these advanced package designs through interconnect innovation and development. Interconnect applications range from PCBs, cable assemblies, and with the proliferation of chiplets, on-package connectors. Increased bandwidth requirements, high current specifications, are driving the interconnect team at RNA to develop high bandwidth, and reliability designs to support next generation high-performance compute applications.